1. Technical Field
The embodiment relates to a semiconductor memory apparatus, and in particular, to an internal write/read pulse generating circuit.
2. Related Art
A semiconductor memory apparatus is designed to perform write/read operations after a predetermined period of a clock when a write/read command are input from outside the memory apparatus.
An internal write/read pulse generating circuit used in a general semiconductor memory apparatus is configured to include an internal write/read pulse generating unit 10 as shown in FIG. 1 to output an internal write pulse ‘WT_inp’ or an internal read pulse ‘RD_inp’ after a predetermined period of a clock ‘CLK’ when an external write pulse ‘WTP’ or an external read pulse ‘RDP’ is input. At this time, the external write pulse ‘WTP’ is a pulse generated when a write command is input from the outside and the external read pulse ‘RDP’ is a pulse generated when a read command is input from the outside. Further, when the internal write pulse ‘WT_inp’ is output, the semiconductor memory apparatus performs the write operation and when the internal read pulse ‘RD_inp’ is output, the semiconductor memory apparatus performs the read operation.
The internal write/read pulse generating circuit of the general semiconductor memory apparatus configured as above is a circuit required for the write or read operation. However, the internal write/read pulse generating circuit has a problem in that transistors receiving the clock repeat turn ON/turn OFF operations due to toggling of the clock in the case of operations other than the write or read operation, thereby consuming current.